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Category: Tips

02/15/11

Permalink 04:55:04 pm, by admin Email , 517 words
Categories: JTAG Boundary-Scan, Tips

Run JTAG Boundary-scan Tests Over the Internet

IntroductionModern computer networks often employ technologies such as firewalls and Network Address Translation (NAT) to keep internal networks safe and secure. However, this extra layer of complexity can make connecting to simple network equipmen… more »
Media Contact: Ryan Jones

Tags: boundary-scan, internet, jtag, tests
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11/11/10

Permalink 07:00:00 pm, by admin Email , 365 words
Categories: JTAG Boundary-Scan, Tips

Flash Memory Programming - Data File Formats

IntroductionScanExpress JTAG/Boundary-scan test execution tools with ISP capabilities (specifically ScanExpress Programmer & ScanExpress Runner) include capability to take in user data files and write them to Flash or other non-volatile memor… more »
Media Contact: Ryan Jones

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07/15/10

Permalink 01:59:02 pm, by admin Email , 257 words
Categories: JTAG Boundary-Scan, Tips

JTAG Boundary-scan Tip: Phase-locked Loops (PLLs) in Clock Buffers

You may have noticed in Corelis' Design for Test Guidelines a note on PLL clock buffers, and why they should be avoided when dealing with boundary-scan tests. PLLs contained in clock distribution ICs generally will not function correctly with a c… more »
Media Contact: Ryan Jones

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06/30/10

Permalink 05:15:59 pm, by admin Email , 278 words
Categories: JTAG Boundary-Scan, Tips

JTAG Boundary-Scan Test Tip: Strong Pull-ups on FPGAs

IntroductionMany FPGAs in their preconfigured state include relatively strong internal pull-up/pull-downs, often in the 4.7k-ohm range or lower. If a weak pull-up/pull-down resistor is attached to such a pin, there is risk that the pull-up/pull-d… more »
Media Contact: Ryan Jones

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06/09/10

Permalink 07:03:03 pm, by admin Email , 313 words
Categories: JTAG Boundary-Scan, Tips

Scan Chain Signal Termination

Termination of the scan chain signals, including both data and clock lines, is often an afterthought in board design but can have a strong effect on signal integrity. We like to stress in ourDFT Guidelines, documentation, and discussions that sig… more »
Media Contact: Ryan Jones

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Corelis Boundary-Scan Blog

This site features posts from the Corelis Support and Engineering team for the purpose of helping to educate other engineers and students alike about Boundary-Scan technology, testing, and maximizing productivity.

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