For Immediate Release

Corelis Introduces Mobile, PCMCIA-based, JTAG Emulators
for the PowerPC™ 403, 603, and 604 Processors

New PCMCIA-based family of JTAG emulators provide mobile emulation support
for the PowerPC 403, 603, and 604 processors

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Cerritos, CA, August 1, 1996 -- Corelis Inc., today revealed a new family of real-time mobile emulators for the PowerPC™ product line. These new Type II PCMCIA-based PowerEM™ emulators utilize the IEEE-1149.1 standard (JTAG) port on the PowerPC processor to provide access to the PowerPC on-chip debug facilities. The emulator includes a powerful Windows™ based source-level debugger.

Unlike conventional real-time emulators that rely on bulky and expensive external hardware pods, the Corelis PowerEM family of emulators uses the IEEE-1149.1 (JTAG) standard test access port to access the internal debug resources available on the PowerPC. This eliminates the need for external pods, thus reducing cost and electrical loading of the target system. Since the debug resources used by the emulator are integrated on the target processor, the emulator automatically supports any clock speed at which the target system runs. In addition to these benefits, the use of the JTAG interface also ensures that processor access is maintained even when the processor 'hangs' or otherwise runs out of control.

Programs and data can be downloaded to any part of the system RAM through the JTAG port without the need for a resident loader program or a ROM emulator. The four wire JTAG interface allows it to be connected to either the PowerPC™ 403, 603, or 604. Thus, switching processors from one design to the next does not obsolete the customer investment in his emulator.

"The introduction of the PCMCIA-based JTAG emulator will enable the PowerPC architecture to be more easily integrated into embedded designs and will result in products being brought to market much faster", said Mike Winters, vice president of sales and marketing for Corelis. "Having a fully featured low-cost Laptop-based mobile debugging tool available for the PowerPC will make it affordable to more hardware and software engineers in the field."

Tom Collopy, IBM PowerPC Embedded Tools Manager, commented: "Corelis brings to the PowerPC tool market a wealth of experience with JTAG low-cost development tools, and will help us support PowerPC customers that prefer working with mobile, laptop-based development tools for field applications."

With the proliferation of the boundary-scan test standard in electronics manufacturing, users are expanding the use of the boundary-scan test logic beyond the scope of just interconnect testing. These new uses include emulation, in-system programming of CPLDs and FLASH memories, functional device testing using the INTEST scan capability, and functional testing of non-scanable cluster logic on the unit under test. These forms of scan based testing usually require large test vector sets and tend to increase test execution times. The new Corelis PCMCIA-1149.1 controller is ideally suited for such applications due to its dual independent TAP controllers, on-board memory, and high sustained TCK clock speed.

The PCMCIA-1149.1 scan controller used in the JTAG emulator requires a single PCMCIA Type II slot, and comes bundled with a Terminate and Stay Resident (TSR) Client Driver for automatic card configuration. The PCMCIA-1149.1 also includes self-test diagnostics routines, Scan Function Library (SFL), and a user manual.

The PCMCIA-based PowerEM JTAG emulator is available now and includes a full featured Windows-based source level debugger.

Corelis Inc., offers a broad line of JTAG emulators and boundary-scan software and hardware products including Automatic Test Pattern Generation (ATPG), diagnostics, vector translators, and a full range of IEEE-Std 1149.1 boundary scan testers for the PC ISA bus, PCMCIA bus, VXI bus, and IEEE-488.2. 

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