For Immediate Release

Corelis’ new Family of EJTAG Emulators for the MIPS™
Processors Exceeds 3 Megabytes per Second Code Download Speed!

The Turbo Scan Engine, initially developed for JTAG-based Testing and
In-System-Programming, has now been incorporated into the
Corelis MIPS-based emulator product line, providing unprecedented throughput
with file download rates exceeding 3 megabytes per second!

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Cerritos, CA, May 3, 2003 -- Corelis Inc. today announced its latest development for MIPS-based emulators. The new MIPS-based emulator support now includes the addition of the Turbo Scan Engine, Corelis’ highest performing boundary-scan architecture. The Turbo Scan Engine was specifically developed to address very high-speed boundary-scan applications, relating initially to test and in-system programming. The Turbo Scan Engine is capable of delivering scan vectors at 100% clock efficiency and with sustained test clock (TCK) frequencies reaching 80 MHz. By combining successfully the resources gained through boundary-scan test and ISP with EJTAG based emulation, Corelis is now able to provide the highest throughput solution for the high bandwidth requirements of today’s most demanding embedded software development projects. 

The Turbo Scan Engine is implemented as the central processing unit of the new PCI-1149.1/Turbo, Corelis’ new high performance boundary-scan controller. By implementing the majority of the JTAG scan-function logic directly in hardware, scan vector throughput was increased considerably.

Typical high-end boundary-scan controller architectures found on the market today allow for file download rates in the range 100-300 Kbytes/sec. To move beyond this threshold requires more than simply increasing the JTAG test clock frequencies, it requires dedicated hardware that is intelligent enough to orchestrate the flow of scan vectors and emulation commands with complete precision. The effectiveness of the Turbo Scan Engine can be seen by noting the quantum leap taken from the typical 100‑300 Kbytes/sec to the ground-breaking 3 Mbytes/sec, a ten-fold improvement.

The ScanICE Turbo emulator packages continue to include a powerful Windows™ 95/98/NT/2000/XP based source-level debugger.

The Corelis emulators use the IEEE-1149.1 (JTAG) standard test access port to access the internal debug resources available from within the MIPS-based processor cores.  This eliminates the need for external pods, thus reducing the cost and electrical loading of the target system.  Since the debug resources used by the emulator are part of the processor core, the emulator automatically supports any clock speed at which the target system runs. In addition to these benefits, the use of the JTAG interface also ensures that processor access is maintained even when a user’s software 'hangs' or otherwise runs out of control. 

Programs and data can be downloaded to the system RAM through the JTAG port without the need for a resident loader program or a ROM emulator. The four-wire JTAG interface allows the emulator to be connected to a target with a single or multiple processor cores, maintaining the ability to access each core independently.  The emulator also supports multiple ICs, each possibly containing multiple MIPS cores, in a single boundary-scan chain.

“Corelis spent considerable effort developing the Turbo Scan Engine, initially directed towards the demanding throughput requirements of JTAG-based Test and In-System Flash Programming. By capitalizing on this development, Corelis was able to bring a powerful, yet low-cost solution, directly into the area of JTAG-based emulation” said Jim Rodgers, Technical Marketing Engineer of Corelis.  “The same throughput enhancements that were achieved for JTAG-based Flash Programming are now seen for JTAG-based code downloading via the JTAG port.  The ability to download program files to target memory through the JTAG port at rates in excess of 3 Mbytes/sec, directly translates to quicker development time and thus quicker time to market”.

MIPS-based emulators utilizing the PCI-1149.1/Turbo™ System are available from stock with prices starting from $6,950. 

As an additional benefit, any of the Corelis boundary-scan (JTAG) controllers included with the emulators can be used to provide boundary-scan interconnect testing.  Corelis also has a full suite of boundary-scan test software available that can be used for interconnect and functional testing. 

About Corelis, Inc

Corelis Inc., www.corelis.com, is a leading developer of hardware and Windows 95/98/ME/NT/2000/XP software products for boundary-scan emulation, testing and in-system programming.  Corelis’ ScanPlus product line is recognized as the highest performance and easiest to use PC-based boundary-scan test system available on the market today and includes tools for Test Pattern Generation, Test Execution, complete pin-level diagnostics and CPLD, FPGA and Flash in-system programming.  Corelis provides a full range of IEEE Std 1149.1 boundary-scan testers for the PC ISA bus, PCI bus, PCMCIA bus, parallel port, LANs, VXI bus and others.

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