|
Testability Review
Corelis can provide you with
design consultation and an analysis of your design for boundary-scan testability. We will review your
design and make specific recommendations that if
implemented will improve the testability. We can also
suggest improvements that will increase test coverage and allow boundary-scan to be
implemented in a more cost-effective manner.
This service also includes
a test coverage analysis that we recommend to do
after schematic capture and before PCB layout. At this stage of
product development, Corelis provides you with a
comprehensive test coverage reports that identifies all of the
boundary-scan nets and pins and classifies them as
completely tested, partially tested, or not tested. The
report also recommends where to add test points (pads)
for physical "nails" access if additional test coverage
is required.
Test Development
Corelis will process your
design information, create all necessary test vectors, and verify the test vectors
using your actual hardware. This is a complete "turn-key"
service resulting in a fully verified and debugged
boundary-scan test system. For companies short of
resources, those who are under a tight deadline, or for
those who are new to boundary-scan and want to be testing
in the shortest time possible, this is an excellent way to
minimize your investment and maximize your effectiveness.
Some of Corelis test development services are listed
below:
-
Development of a boundary-scan test procedure
including test coverage analysis
-
Interconnect, memories, and clusters testing
-
Flash memories and CPLDS programming
-
Parallel testing and programming of thousands of
boards
-
ScanReuse application to ensure maximum reuse of
test and programming files when moving to Flying
probes and ICTs
-
Deploying testing and in-system programming for
field service applications
-
Turn key solution including test fixtures
|
