Corelis
JTAG Emulation Support for
Xilinx Virtex-II Pro™ FPGA PowerPC®
405 Core
The very high-performance
Xilinx Virtex-II Pro™ FPGA PowerPC®
405 Cores demand software and hardware debugging tools
that are fast, non-intrusive, and yet easy to use.
Corelis’
innovative JTAG in-circuit emulators provide a real-time,
non-intrusive development and debug environment for
Virtex-II Pro™ PowerPC®
405 Cores using their enhanced industry-standard
IEEE-1149.1 (JTAG) boundary-scan debug port. This interface
allows for a simple, yet robust, interface to the target
processor.
Corelis
offers two different methods for programming flash devices
connected to Xilinx Virtex-II Pro FPGA PowerPC 405 core.
Read more…
Features:
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Figure 1 - USB-1149.1/E JTAG Controller |
Corelis’ innovative JTAG in-circuit emulators provide a
real-time, non-intrusive development and debug environment for PowerPC 4XX
processors using their enhanced industry-standard IEEE-1149.1 (JTAG)
boundary-scan test port. This interface allows for a simple, yet robust,
interface to the target processor.
The processors’ on-chip boundary-scan logic allows complete,
non-intrusive CPU resource access through the JTAG port, even when the
processor ‘hangs’ or otherwise runs out of control. The emulator/debugger
communicates with the target exclusive of serial ports or other peripheral
resources, and no ROM-based debugger or loader program is required.
Corelis JTAG emulators are available with PCI, USB 2.0, PCMCIA, Parallel
Port and Ethernet IEEE-1149.1 JTAG controllers, to give you flexibility in
designing your host and target environment.
The portable USB-1149.1/E USB 2.0 controller, shown in Figure 1,
plugs into a USB port on the computer and provides full debugging capability
without any further hardware installation on the host PC. This controller is
extremely useful in labs or other space-limited environments where
workstations are frequently swapped. It is also useful in the field of
troubleshooting and/or updating software, as it is ready to go by simply
installing the software and plugging it in.
The PCI-1149.1/Turbo™ controller, shown in Figure 2,
provides the fastest operation in a relatively permanent installation. The
PCI-1149.1/Turbo, a single-slot high-performance JTAG controller, is fully
compliant with Revision 2.1 of the PCI Bus Specification. Easily configured
and installed in a single PCI slot, the PCI-1149.1/Turbo connects to the
target processor through a high-speed 16-pin JTAG pod.

Figure 2 - PCI-1149.1/Turbo JTAG Controller
The portable PCMCIA-1149.1/E controller, shown in Figure 3,
facilitates software development and debugging from any computer that
supports the Personal Computer Memory Card Industry Association (PCMCIA)
peripheral interface. The PCMCIA-1149.1/E - based emulators are useful in
labs where space is limited, and in the field for troubleshooting and/or
updating software.

Figure 3 - PCMCIA-1149.1/E JTAG Controller
The portable PIO-1149.1/E controller, shown in Figure 4,
plugs into the computer’s parallel port and provides full debugging
capability without any further hardware installation on the host PC. This
controller is extremely useful in labs or other space-limited environments
where workstations are frequently swapped. It is also useful in the field of
troubleshooting and/or updating software, as it is ready to go by simply
installing the software and plugging it in.

Figure 4 - PIO-1149.1/E JTAG Controller
The NetUSB-1149.1 controller, shown in Figure 5, is a stand-alone box which
is connected either to a 10/100Base-T Ethernet LAN or USB port and is hooked
up to the target board. This allows any Windows-based PC on the LAN to debug
the target or to alternately debug directly through the USB port on the
computer.

Figure 5 - NetUSB-1149.1 JTAG Controller
Due to the unique nature of the emulator, the same hardware
board can be used for any of the PowerPC family of processors that have
IEEE-1149.1 compatibility. Thus, a developer using a PowerPC family
processor can migrate to other PowerPC chips as they are introduced and
retain the investment in hardware tools by merely installing another version
of the emulator software.
Debugger
Corelis JTAG emulators include the
powerful CodeRunner™ source-level debugger with multiple-window support,
allowing the developer to view source code, assembly code, variables (both
local and global), memory, and register locations at the same time. It also
supports the concurrent debugging of targets with multiple ICs and/or CPUs,
providing the capability to display windows for each IC/CPU on the screen
simultaneously. CodeRunner provides full source-correlated debugging,
allowing the user to display the source for a particular line of assembly
code and vice versa.
CodeRunner has a modern “XP look and
feel”, and features a very straightforward and user-friendly interface.
Anyone familiar with the usage of source-level debuggers will master
CodeRunner’s powerful features quickly without much of a learning curve.
CodeRunner works with all popular
C/C++ cross-compilers that generate ELF/DWARF 1 and ELF/DWARF 2 debug
information. The user has the option to automatically load all debug symbols
along with the executable, and these symbols will be displayed alongside of
each line of assembly code.
The debugger has the ability to
adjust debug source file pathnames, facilitating the ability to use the host
PC to debug executables that were compiled in Linux.
Supported functions of CodeRunner include:
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Reset processor
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Start and Stop program execution
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Set breakpoints in RAM
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Set breakpoints in ROM or Flash using
hardware breakpoints
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Single-step source or assembly code
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Single-step into or over function calls
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Single-step out of function calls
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Display and modify processor registers
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Display, modify, and fill memory
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Display and modify all variables
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Display current function call stack
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Support for 32-bit virtual, 64-bit virtual, and
40-bit physical address modes
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Internal Trace Unit support to monitor bus
activity
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Save memory, register, and Trace Unit values to a
comma-delimited text file
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Disassemble memory using PowerPC processor
mnemonics
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Download code and optionally display symbol
information
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Powerful macro and custom toolbar capabilities
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“C”-style command file support, allowing the user
to write his own emulator functions using conditional statements, loops,
variables, etc.
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Unlimited number of Watch windows for keeping track
of important variables
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“Type-over” modification in register, memory, and
variable windows, where the user can simply type in a new value over the old one
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Logging capability
Variables
The debugger can display four types of variables:
Memory locations can be displayed in hex or decimal at
any address. All variables are displayed with their type (char, int,
unsigned long, etc), and all arrays and structures can be broken down into
individual elements.
Macros
CodeRunner provides an extensive macro and custom button
capability. Macros are a sequence of commands (start processor, halt
processor, write memory, set breakpoint, etc.) that can be formed into a
single user-defined command. Macros can then be attached to Custom Toolbar
buttons, allowing the user to create custom one-click buttons for the
sequence of actions he uses most. The PCI-1149.1/Turbo™ boundary-scan controller card is
the key element of the ScanExpress system. The PCI-1149.1/Turbo contains
several performance enhancing functional sections aimed at increasing test
vector and in-system programming throughput. The combination of these
functional elements results in a very high data-scanning rate, which is
completely decoupled from the PCI bus and the host computer.
Command Files
One of CodeRunner’s most powerful features is its ability
to execute Command Files, which are written by the user in a structured
“C”-like language. The “commands” used by command files consist of
CodeRunner-related functions, such as reading/writing memory, starting the
processor, halting the processor, reading/writing registers, etc.
Command files may also contain user-defined Macros. Command files are most
useful to perform tasks that need to be repeated by the user every time
CodeRunner is invoked, such as using CodeRunner to configure certain
internal registers and/or the memory controller. Since the script language
contains conditional commands (such as “if”), different actions can be taken
by the same script, based upon the values read out of memory or registers.
Those familiar with “C” programming will be able to create complex
CodeRunner command files within minutes.
Items Included with
this Product
-
CD containing CodeRunner source-level debugger
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Boundary-scan controller (see Ordering
Information for model)
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Emulation cable
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User’s Manual
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Power Supply (NetUSB-1149.1 and PIO-1149.1/E
controllers only)
Corelis offers two
different methods for programming flash devices connected to a
Xilinx Virtex-II Pro FPGA PowerPC 405 core
In-system Flash Programmers are
divided into two categories. The first is the Target Assisted
Flash Programmer that utilizes the Xilinx Virtex-II Pro FPGA
PowerPC 405 core to aid in programming. The second is the
ScanPlus Flash Programmer that utilizes only the IEEE-1149.1
JTAG instructions of the Virtex-II Pro, and no
PowerPC 405 processor resources. Corelis
stands unique in the industry by providing both solutions. The
differences between these two approaches are outlined below.
The unique aspect of the Target
Assisted Flash Programmer is that it utilizes the JTAG based
emulation features of the embedded PowerPC 405 processor and a
small amount of target memory. The program data image is first
downloaded into target RAM together with a small programming
stub. The PowerPC 405 is then transitioned from Debug mode into
Normal mode and programs the Flash memory in real time.
With the Target Assisted Flash
Programmer, you can program your on-board FLASH memory by simply
identifying your FLASH device and its location in the system
memory map. Using these target resources, the Target Assisted
Flash Programmer operates very quickly and contains a wealth of
additional features, like running script files, dumping data to
log files, data-to-file comparison routines and many more. The
underlying assumption when using the Target Assisted Flash
Programmer is that the target board is fully functional and that
the CPU can access target RAM. (Initialization scripts can be
optionally used, if required, to configure the target processor
board to provide the necessary RAM.)
The ScanPlus JTAG Flash Programmer
operates at the board-level rather then the device level. It
accepts as inputs the board net list and the BSDL files for the
boundary-scan devices on the printed circuit board assembly. The
ScanPlus Flash Programmer will then program board FLASH
memories, CPLDs, and configuration EPROMS, using only JTAG
commands.
With the ScanPlus Flash Programmer,
you can still perform in-system programming even if the CPU
fails to boot due to assembly defects, configuration errors, or
erroneous designs. Being able to program and configure not
functional board assemblies will help identifying the
problematic areas that are preventing the proper operation of
the design. The ScanPlus Flash Programmer is usually the proper
choice for board bring-up and production environments. The
underlying assumption when using the ScanPlus Flash Programmer
is that you have access to the board netlist and BSDL files.
Both
the Target Assisted and ScanPlus Flash Programmers can be used
with the same Corelis hardware (JTAG controller). By offering
both programming solutions, you can always be sure to have
access to the right tool for your in-system programming needs.
In addition, Corelis provides a complete line of tools for
boundary-scan test using the same JTAG controllers that are used
for JTAG emulation and programming.
For more detailed information about
the Target Assisted and ScanPlus Flash In-System programmers,
please read the data sheets below.
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