| |
Runner-Lite: Complete Structural and Functional
Test Solutions

Runner-Lite is a free test executive tool for performing
boundary-scan tests, JTAG Embedded Tests (JET), and in-system
device programming using pre-generated test plan files built for
specific reference boards. Based on
ScanExpress
Runner, the executive member of Corelis' full-featured
ScanExpress software suite, Runner-Lite offers a simple and
more streamlined user interface to allow execution of
downloadable test plan files designed and made available through
Corelis.
Runner-Lite was designed to provide engineers visibility,
awareness, and accessibility to board level JTAG testing. The
tool applies boundary-scan test patterns to a reference board,
reads back the responses, and provides comprehensive fault
detection and isolation of boundary-scan chain infrastructure,
board interconnect, pull-up/pull-down resistors, and clusters
such as CPLDs, memories, and FIFOs. The tool also performs
at-speed functional tests on peripheral components connected to
the on-board processor. Runner-Lite additionally supports
In-System-Programming (ISP) of CPLDs, Flash memories, and serial
EEPROM devices.
Runner-Lite includes a powerful graphical fault identification
subsystem that helps isolate the location of PCB faults. The
tool is able to display a CAD-based photographic representation
of a reference design to facilitate the rapid discovery and
actual location of any failure, even when they are hidden
underneath devices. By using Runner-Lite, engineers have the
ability to visually associate fault diagnostic data to the
virtual PCB representation.
Runner-Lite
offers unrestricted access to complete off-the-shelf JTAG
structural and functional test solutions for the most popular
silicon vendor reference designs available today. Use it to
familiarize yourself with Corelis tool capabilities or use it as
a test bench for your own reference board based designs. If
you’re new to JTAG or have been hesitant to implement this test
technology, let Runner-Lite put circuit board test convenience
into your hands.
Click here to
download the Runner-Lite Installer!
|
Requirements: Windows
XP/Vista/7 (32/64-bit), 1Ghz CPU, 512MBRam, 300MB Hard
Drive Space, Blackhawk USB560BP, USB560m, LAN560, or
PCI560 emulator |
|
Setup File:
Runner-Lite-Installer.exe |
Main Features
-
Built-in test
sequencer that automatically executes independent test steps
-
Executes
structural and functional board tests via a simple JTAG
connection
-
Complete
ready-to-run reference design test procedures
-
Detects and
isolates faults down to the net and pin level
-
Easy-to-use
graphical user interface
-
Programs Flash
& other programmable devices
-
Detailed fault
reports and proximity diagnostics
Additional Features
-
Fault
diagnostics are linked to a virtual PCB image
-
Identifies
failures by fault type including stuck-at, open, and short
-
Double-sided
PCB support
-
Powerful zoom,
pan, auto-center, and filter functions
-
Netlist & parts
browser highlights component, pin, and via locations
Benefits
-
Complete,
ready-to-use board test solution, including at-speed and
interactive functional tests
-
Fully working
test procedures means zero test development time
-
No test
fixtures and no physical test probes required
-
Find faults
before any application code is ready
-
Relieves
software engineers from the necessity of developing test
code
-
Quickly
identifies hardware faults allowing designers to focus on
product features
-
Boards do not
have to be in a bootable state for fault diagnostics
-
Rapidly release
prototypes by spending less time debugging hardware problems
-
Flash
programming at maximum theoretical programming rates
-
Allows complete
control and visibility of UUT resources
-
Accelerates
diagnosis and repair of faulty circuit boards
Reference Board Test Procedure
Download
Each Runner-Lite test plan is
custom built for a particular reference design and includes
relevant test steps to perform structural testing, functional
testing, and In-System Programming (ISP). Runner-Lite connects
to the board through its standard JTAG Test Access Port (TAP).
Click on a link below to jump to a specific reference board web
page.
|
Board Name |
|
TI OMAP35x EVM |
Developed with Mistral Solutions, the OMAP35x Evaluation Module (EVM)
enables developers to immediately start evaluating OMAP35x processors
(OMAP3530, OMAP3525, OMAP3515, OMAP3503) and begin building low power
applications |
 |
|
|
|
|
The Runner-Lite Interface
Runner-Lite Editorial
 |
|
 |
|
|
Read more about Runner-Lite in this article from the 2011
Embedded Processing & DSP Resource Guide from Texas Instruments. |
|
|
|
 |
|
 |
|
 |
|
|