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Corelis' ScanExpress keeps Rapid2 on track
Corelis' boundary scan test tool
ScanExpress
finds manufacturing defects in complex high-speed data
acquisition cards and enables scientific project to keep to
schedule
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Months of extensive
commissioning now no longer required
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Interconnect testing more than
32,000 PCB nets in seconds
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Automatic test pattern
generation
Brackley, UK - 17th December
2001 - Engineers at Daresbury Laboratory
are using Corelis' boundary scan tool,
ScanExpress to validate the interconnect including memory
interconnect between hundreds of ICs on a number of complex 19
inch (12U) data acquisition cards for the laboratory's Rapid2
project. The cards are 10- layer PCBs, populated both sides, and
many of the components used are packaged in ball-grid-arrays (BGAs),
making probe testing impossible.
By performing automated boundary
scan tests ScanExpress can validate the PCB's interconnect (more
than 32,000 nets connecting more than 1800 components) in a
matter of seconds. This and ScanExpress' ability to marry boundary
scan description language (BSDL) models of the card's components
with the design's netlist, means comprehensive tests and
programming files are created automatically.
Andy Hill, Systems Commissioner in
Daresbury Laboratory's Instrumentation Department commented:
"The data acquisition cards are extremely complex and, if they
don't function correctly when they come back from manufacture,
we can't 'buzz' them out because the majority of critical nets
run between BGA packaged devices and never surface."
The Rapid2 project, set to acquire
data from position sensitive X-ray detectors (used in scientific
experiments) and due for completion in early 2002, ran into
problems earlier this year when prototype cards failed to
function correctly. As the engineers at Daresbury had no access
to nets running between BGAs it was impossible to validate the
interconnect.
"The data acquisition prototype
cards implemented only a partial boundary scan chain," recalled
Hill, "but this was used only to program the design's PLDs. When
the prototypes came back from manufacture and didn't function
correctly we suspected that the BGAs hadn't seated properly but
had no way of proving it. We even X-rayed the devices but this
told us little as, whilst it's possible to see the solder balls,
you don't know for a fact that they're in good electrical
contact with the PCB's pads."
Several weeks were spent during the
summer of 2001 writing functional software to exercise parts of
the prototypes, but - as Rapid2 requires 16 data acquisition
cards - it soon became clear to the Instrumentation Department
that they could not test all cards in this fashion and keep to
the project's tight timescales. To this end, the ADC design was
updated to include a full boundary scan chain. Hill: "This means
that we can now effectively 'buzz' the cards out from within the
devices on the cards and prove a) that all devices are present
and correct and b) that the interconnect between components is
electrically sound."
A number of boundary scan tool
vendors and their solutions were assessed during the summer of
2001, but of these only Corelis promised the fastest solution
and smoothest integration (with Daresbury's CAD tools).
Hill concluded: "Thanks to Corelis'
ScanExpress system, and the ease with which it integrated with our
CAD tools to automatically generate thorough and comprehensive
boundary scan test patterns, the Rapid2 project is now back on
schedule."
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