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BSDL File Validation
Corelis offers services
to validate the accuracy of Boundary-Scan Description
Language (BSDL) files that characterize the
boundary-scan functionality of semiconductor devices.
These services include validation of a device’s BSDL
file while the chip is still in development and BSDL
file accuracy verification against actual silicon.
BSDL file quality is essential to
improving the testability of printed circuit boards and systems
for hardware manufacturers. When a BSDL file is inaccurate or
the implementation of boundary-scan in a device is poorly
executed, testing or programming the device will require
additional time and effort to troubleshoot. Moreover, in the
worst case, an inaccurate BSDL file will reduce boundary-scan
test coverage in every product where the device is designed-in.
Corelis’ BSDL validation service
provides syntactic and semantic checks on the file, confirming
correct spelling, punctuation, instruction codes, register
associations and register cells, as required by the 1149.1
standard. As part of the service, we also generate test
patterns, creating a set of test vectors in a simple
truth-table. These vectors can be used to simulate chip testing
to verify that it meets many of the requirements of the IEEE
1149.1 boundary-scan standard.
After a BSDL file has been
syntactically and semantically verified and first samples of the
semiconductor device have been produced, the accuracy of the
file can be validated against actual silicon with Corelis’ chip
testing service. Corelis works jointly with customers to develop
a silicon test fixture that provides proper power and ground,
boundary-scan access to each I/O, access to TRST, TMS, TCK, TDI
and TDO, and static control of compliance enable pins. A full
test sequence is generated by Corelis for the validation of the
BSDL file against the silicon.
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Engineering Services
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