We often talk about system, circuit, and PCB complexities driving the transition toward boundary-scan, but what do these refer to? We often list the hurdles: BGAs, blind & buried vias, stacked dies, complex components on both sides of the PCB, smaller and denser PCBs—the list goes on. Let’s take a quick look at one set of item on this list: blind & buried vias. While not new technologies, these techniques are part of a greater trend of squeezing more capability into a smaller space.

Controlled drilling techniques have opened up the possibility for denser multi-layer circuit boards. By shortening vias to only pass through necessary layers, more surface area on both sides can be opened up for components.

Figure 1: Diagram of a Printed Circuit Board

Blind Via
A blind via extends to only one surface of the printed circuit board. Blind vias may be used for SMT or BGA pads. Because blind vias touch the surface on one side of the board they may be accessible to physical probes.

Buried Via
A buried via does not extend to either surface of the printed circuit board. Buried vias are not directly accessible to external probes.

What does it mean for circuit test?
A via that is not accessible from the surface of the board is, by extension, not available to external probes from test machines. Sure, you could bring out a test point for the net, but there’s a good chance that the point of using a buried or blind via in the first place—to help reduce the amount of surface needed on the PCB!

Boundary-scan & JET have the advantage over ICT in these respects: instead of bringing all critical nets to the top of the board, you can bring the test straight to the net and have the same digital net & pin level diagnostics you would get for surface faults.

Boundary-scan is a great way to increase test coverage even when already using an ICT or as a lower cost alternative for designs with a low probe access. For those integrating into an ICT, check out our ICT integration web pages In-Circuit Tester Integration & Support for In-Circuit Testers and Flying Probes.

Published On: January 30, 2012Categories: Corelis Boundary-Scan Blog, JTAG Boundary-ScanTags:

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