The May 2018 issue of U.S. Tech features our article, “Triangulating BGA Faults with Boundary Scan“. View the article to learn how JTAG can be used to detect and diagnose manufacturing defects related to BGA devices.
Read More »ScanExpress Software Operating System Support
Microsoft has declared that support for the Windows XP operating system has ended as of April 8, 2014; no further security updates and technical support will be provided. As a result, many organizations are upgrading their infrastructure with new systems running Windows Vista, Windows 7, Windows 8/8.1, and Windows 10 operating systems. End of Support for Windows XP Since Corelis ...
Read More »4 shunt tips for JTAG boundary-scan testing
Shorting jumper shunts are frequently used to configure a unit under test (UUT) a particular way for boundary-scan testing–perhaps a compliance enable signal must be met or FPGA configuration needs to be inhibited. Because these shunts are meant to configure the system for test mode and could cause functional failures, it is important to ensure that test-only shunts are removed ...
Read More »New ScanExpress JTAG Software Version 8.2 Feature Highlights
Corelis ScanExpress JTAG software version 8.2 is now available! All users with a current maintenance contract can download the software from our download site and new shipments will include the updated software. Software enhancements, new features, and updated device models have been applied across the entire suite of products. Featured Enhancements ScanExpress Viewer ODB++ Support and Trace Display ScanExpress Viewer ...
Read More »There’s still time to sign up for spring & summer JTAG training
There’s still room available in our spring & summer 3-day training class, held in Cerritos, California. Remaining classes for 2015 include: Enjoy the wonderful Southern California weather as you learn about JTAG / boundary-scan concepts and best practices, including: Call or e-mail Corelis Training (training@corelis.com, +1 (562) 926-6727) today to reserve your spot, or .
Read More »Tip: Send a JTAG test log to your e-mail account using Blat
Tip: Send a test log to your e-mail account using Blat Introduction Being notified when a test plan completes can be very useful for those times when you’ll be a way from the test station but need to know when the test has finished. Luckily it’s very easy to send a test log by e-mail using ScanExpress tools and the ...
Read More »Run JTAG Boundary-scan Tests Over the Internet
IntroductionModern computer networks often employ technologies such as firewalls and Network Address Translation (NAT) to keep internal networks safe and secure. However, this extra layer of complexity can make connecting to simple network equipmen…
Read More »Flash Memory Programming – Data File Formats
IntroductionScanExpress JTAG/Boundary-scan test execution tools with ISP capabilities (specifically ScanExpress Programmer & ScanExpress Runner) include capability to take in user data files and write them to Flash or other non-volatile memor…
Read More »JTAG Boundary-scan Tip: Phase-locked Loops (PLLs) in Clock Buffers
You may have noticed in Corelis' Design for Test Guidelines a note on PLL clock buffers, and why they should be avoided when dealing with boundary-scan tests. PLLs contained in clock distribution ICs generally will not function correctly with a c…
Read More »JTAG Boundary-Scan Test Tip: Strong Pull-ups on FPGAs
IntroductionMany FPGAs in their preconfigured state include relatively strong internal pull-up/pull-downs, often in the 4.7k-ohm range or lower. If a weak pull-up/pull-down resistor is attached to such a pin, there is risk that the pull-up/pull-d…
Read More »