The IEEE-1149.1 standard has become ubiquitous over the years thanks to heavy
use in structural test and system debug and is poised to continue to grow and
adapt with new IC and board-level technologies. To better understand 1149.1 and
its 1149.x counterparts, we’ll take a brief look at each of these standards.
1149.1 IEEE Standard Test Access Port and Boundary-Scan Architecture
The IEEE-1149.1 standard for boundary-scan (also known as JTAG) was introduced
in 1990 and has steadily grown in popularity over the last two decades.
IEEE-1149.1 provides a framework for structural test as well as defining the TAP
port used for communication. The JTAG TAP has also used for applications
including In-System-Programming (ISP), emulation and source-level debugging, and
more recently has been expanded to emulation-based functional test in the form
of JTAG Embedded Test (JET).
1149.4 Mixed-Signal Test Bus
Introduced in 2000, the IEEE-1149.4 standard provides analog and mixed-signal
test capability through boundary-scan. IEEE-1149.4 defines a two-wire analog bus
consisting of an analog drive and analog sense pin. By including circuitry
within the IC to connect these pins to different analog nodes, the JTAG port can
be used to perform analog and mixed signal measurements. A decade after release,
the IEEE-1149.4 standard has not seen wide adoption.
1149.5 Module Test and Maintenance Bus (MTM-Bus) Protocol
Released in 1995, the IEEE-1149.5 standard defines a serial, backplane, test and
maintenance bus, called MTM-Bus. The MTM-Bus protocol defines the physical,
link, and command layers used to communicate between modules in a test system.
The 1149.5 standard operates at the board/system level in the same way that
1149.1operates at the chip level.
1149.6 Boundary-Scan Testing of Advanced Digital Networks
The IEEE-1149.6 standard, released in 2003, expands on the 1149.1 standard by
adding additional capabilities for transmitting and receiving test signals over
advanced digital networks. The 1149.6 standard provides additional test and
diagnostic capabilities for AC-coupled and differential network above and beyond
what was originally possible with the 1149.1 standard. IEEE-1149.6 has been
picking up steam in recent years and is now commonly implemented in
boundary-scan components with high speed digital I/O capabilities and is
expected to see continued increases in adoption.
1149.7 Reduced-Pin and Enhanced-Functionality Test Access Port and
IEEE-1149.7 represents the newest addition to the 1149.x standards. Release in
2009, 1149.7 is intended to be complementary to the 1149.1 standard. Major
features include reduced pin count and star topology support as well as
chip-level bypass, individual devices addressing, and power consumption control.
This new standard was developed with modern multi-core and multi-chip-module IC
designs in mind, paving the way for JTAG test on a new generation of smaller,
faster, and more power efficient systems.