Over the next few weeks, we’ll take a look at the SPI bus and how it relates to Corelis tools including ScanExpress TPG, ScanExpress Runner, and ScanExpress Programmer. ScanExpress tools support direct access to the SPI bus on the latest JTAG controllers, as well as boundary-scan SPI control, where boundary-scan pins are used to emulate a SPI master. To start things off, let’s go over a brief overview of the SPI bus.
The SPI Bus
SPI is a standard for full duplex, serial communication developed by Motorola and widely used as a simple, serial communication interface. SPI, unlike similar serial protocols like I2C, is not documented by an officially released specification, nor is it controlled by a standards body. This means there are many variants out there that may operate slightly differently.
- SCK/SCLK: Serial Clock.
- SDI/MOSI: Serial Data In (Master Output, Slave Input).
- SDO/MISO: Serial Data Out (Master Input, Slave Output).
- CS/SS: Chip Select (Slave Select).
Figure 1: Example SPI bus with 3 independent slaves
Advantages and Disadvantages
From the perspective of development, debug, and test, SPI has certain advantages and disadvantages with respect to similar serial specifications such as I2C.
- High throughput. SPI is significantly faster than I2C. SPI devices can range from 1 MHz to 50 MHz, compared to I2C’s standard 100 kHz to 400 kHz.
- Full Duplex. Separate input and output pins allow SPI better performance and versatility.
- Simple Hardware and Software. SPI is widespread precisely because it is incredibly simple to implement. It does not have the protocol complexities of I2C.
- No multi-master support or slave acknowledgement. To keep things simple, SPI does not have the robust multi-master, slave flow control, or error handling features of I2C.
- More pins than I2C. I2C uses only one data line and no chip select, requiring half the signals of SPI.
- No formal standard. Without a standards body controlling SPI, there is no guarantee that all parts will behave the same and conform to a specification.
Relationship to JTAG
It’s no coincidence that JTAG, our favorite serial test interface looks similar the SPI diagram above. JTAG is a daisy chain configuration of SPI—each SDO (now called TDO) port on the slave chains to the SDI (TDI) of the next device. TMS replaces the slave chip select and is connected in parallel to all devices, allowing mode selection based on the TAP state machine.
Figure 2: JTAG is a daisy chained SPI configuration
SPI is widely used today; in fact, it is rare to see a microcontroller or applications processor that does not include a SPI interface for Flash or other serial devices. Next week we’ll take a look at SPI Flash and how to use ScanExpress Runner or ScanExpress Programmer to program these devices directly or through boundary-scan.