by Corelis Inc. Corelis Inc.

Corelis Advances Industry Initiatives to Promote
and Improve Circuit Test

JTAG solutions provider supports IEEE standardization efforts and INEMI program

Cerritos, CA, October 2, 2008 – Corelis announced today that it is providing key support to several industry-wide efforts to advance industry-wide electronic circuit test technology and increase the adoption of boundary-scan methodology. Corelis is helping guide the IEEE 1149.7 and IEEE 1687 standards and is an active participant in International Electronics Manufacturers Initiative (iNEMI) Boundary Scan Adoption Project.

George B. La Fever, President and CEO of Corelis, said, “Our clients, and electronics companies in general, are continually looking for ways to improve testability in response to the rising complexity and component density of their products. At many companies, technology advances can impede test quality and result in higher test costs. Corelis is pleased to be able to apply our unique test expertise and years of experience, toward defining new standards that can alleviate challenging test issues. We also support the iNEMI program to encourage the adoption of boundary-scan as one of today’s most effective ways to reduce test costs and improve product quality.”

IEEE Standard 1149.7
Corelis is actively supporting both the development and the adoption of the IEEE 1149.7 standard, which is expected to be ratified in early 2009. IEEE 1149.7 is a complementary and compatible superset of IEEE 1149.1 (JTAG) that reduces the test interface pin-count from four to only two using the IEEE 1149.7 standard. Despite this impressive economy which is sure to appeal to IC vendors and board designers alike, IEEE 1149.7 also provides powerful extensions, addressing System-on-Chip (SoC) architecture challenges, including scan performance for boards with multi-core devices, power domains, varied device connection topologies and background data transfers. To achieve higher performance for multi-core and other complex IC and packaging applications, the IEEE 1149.7 offers chip-level bypass mechanisms to shorten scan chains, greatly improving the debugging experience.

“IEEE 1149.7 is well on its way to ratification next year and is now being implemented by a number of IC companies,” according to Stephen Lau, emulation technology product manager, Texas Instruments (TI) and a key IEEE 1149.7 proponent. “Corelis, with its years of JTAG experience, has made significant contributions to the emerging standard, and we are very pleased that Corelis will back the standard with its full complement of outstanding products and support when IEEE 1149.7 is ready for deployment.”

Internal JTAG (IEEE P1687)
Corelis is engaged in defining the industry-wide initiative IEEE P1687, commonly referred to as IJTAG (Internal JTAG). IJTAG is a draft standard for access and control of instrumentation embedded within an integrated circuit. The drive for the standard grows from the realization by electronics manufacturers that external design validation; testing and debug technologies are simply running out of gas. More and more chip manufacturers are embedding instruments into silicon as the most practical way of providing the necessary control and observation of both component and system behaviors. Without an accepted standard, however, these instruments require custom, dissimilar management and configuration tools, and devising an integrated solution for board and system-level test becomes increasingly difficult. IJTAG proposes a methodology for access to embedded test and debug features (while not specifying the features themselves) through the IEEE 1149.1 TAP (Test Access Port). The elements of the methodology include a description language for the characteristics of, and communication with, the embedded instruments, and hardware requirements for interfacing to the features.

“IEEE P1687 creates an open ecosystem for deployment of embedded instruments to enhance coverage of IC, board, and system development and test,” according to Kenneth Posse, chairman of the IEEE P1687 Working Group. “Corelis has a broad client base and thus one of its key contributions is to help ensure that IJTAG truly meets both the business and technical needs of the industry at large.”

iNEMI Boundary-Scan Adoption Project
Corelis was already a committed member of the iNEMI Boundary-Scan Adoption Project when it was officially launched earlier this year. The project’s ultimate objective is to broaden the use of boundary-scan across the electronics industry. The initial phase will consist of an industry survey to determine the state of, and obstacles to, adoption. After the survey results have been analyzed and published, the project team will define and initiate actions to address any significant obstacles.

Stated Jim McElroy, iNEMI CEO, “Boundary-scan is clearly a cornerstone technology of today’s circuit board test and, given the inevitable increases in board density, compounded by the universal mandate to keep test expenditures down, we expect boundary-scan will become even more essential in the future. By assuming a key role in our Boundary-Scan Adoption Project, Corelis is fostering cooperation among both complementary and competitive participants, toward iNEMI’s goal of providing industry-standard solutions that will help advance manufacturing technology.”

About Corelis

Corelis, Inc., a subsidiary of Electronic Warfare Associates, Inc., offers bus analysis tools, embedded test tools, and the industry’s broadest line of JTAG/boundary-scan software and hardware products combining exceptional ease-of-use with advanced technical innovation and unmatched customer service. Since its founding in 1991, Corelis has delivered a diverse range of electronic test equipment solutions for customers across a wide range of industries, including aerospace, defense, medical, manufacturing, networking, and telecommunications. Today, Corelis continues that trend with focus on product ease-of-use and dedication to customer service.

Corelis’ ScanExpress boundary-scan systems are used for interconnect testing as well as JTAG functional emulation test and in-system programming of Flash memories, CPLDs and FPGAs. Systems include a complete range of IEEE-1149.1-compatible boundary-scan testers for PCI, PCI-Express, 10/100 LAN, USB 2.0, cPCI/cPXI and VXI host interfaces.

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