Programming serial buses using boundary-scan methods can be very slow; emulating
a serial bus through boundary-scan means that we must scan the boundary-scan
chain for each signal transition. The effective clock rate decreases with
boundary-scan chain length, slowing down programming time dramatically.

To facilitate high speed serial programming through a single hardware unit and
software environment, the TAP connectors on Corelis’ current family of JTAG
controllers also include signals for direct programming of SPI and I2C bus
devices in addition to standard JTAG signals.

  • USB-1149.1/1E
  • USB-1149.1/4E
  • NetUSB-1149.1/E (Blue LED)
  • ScanTAP-4 (Blue LED)

For pinout, termination, and
additional TAP design information, see Application Note AN 06-188 Scan TAP
Connectors on our ScanExpress
Family Product Support Page
.

SPI Flash Memory Connection Schematic
Figure 1: SPI Flash Memory Connection Schematic (Source: AN 06-118)

For a third party comparison of JTAG, SPI, and I2C programming, take a look at
Spansion’s Comparing
JTAG, SPI, and I2C
 application note. It should be noted that this document
is a few years old–it is not uncommon for modern SPI Flash to push 50 MHz or
100 MHz programming rates!

Published On: August 24, 2010Categories: Corelis Boundary-Scan Blog, JTAG Boundary-Scan

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