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Design for Testability Tips and Guidelines

JTAG Emulator

Boundary-Scan Chain

A working boundary-scan chain is one of the most critical pieces to performing successful boundary-scan tests. These suggestions provide design engineers the knowledge to correctly implement boundary-scan chains in their projects.
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Board Level Design

Board-level design is critical for successful boundary-scan testing. Boundary-scan begins at the IC level—designer engineers must follow PCB design guidelines to provide useable boundary-scan implementation for all departmental applications.
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Testing Board

Improving Test Coverage

Everyone strives for 100% test coverage, but complete coverage is extremely difficult and expensive to achieve. These suggestions will enable you to improve and add product test coverage to get the most out of boundary-scan testing.
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JTAG Test & Programming

Firecron JTS15S

The Firecron JTS15S core is a unique method of reducing flash programming time over the IEEE-1149.1 interface—by reducing the size of the boundary-scan register, in-system-programming (ISP) time can be significantly reduced.
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