Corelis JTAG Glossary

Below is a glossary of terms and abbreviations commonly used throughout the Corelis website.

TermDefinition
ADOAdvanced Diagnostics Option
BDOBasic Diagnostics Option
BSDLBoundary-Scan Description Language
CPLDComplex Programmable Logic Device
CSVComma-separated value file (comma-delimited file)
CVFCompact Vector Format
FIFOFirst-In-First-Out
FPIFlash Programming Information
GUIGraphical User Interface
ETFExtensible Test Format
ICIntegrated Circuit
IEEEInstitute of Electrical and Electronics Engineers, Inc.
ISPIn-System Programming
JAMA device programming and test language
JEDECThe JEDEC Solid State Technology Association (Once known as the Joint Electron Device Engineering Council)
JTAGIEEE 1149.1 Standard Joint Test Action Group interface
PCBPrinted Circuit Board
SOFStop-on-failure
STAPLStandard Test and Programming Language
SVFSerial Vector Format
TAPTest Access Port, interface to connect to Corelis Controller
TTDTruth Table Diagnostics
UUTUnit Under Test