Corelis JTAG Glossary
Below is a glossary of terms and abbreviations commonly used throughout the Corelis website.
Term | Definition |
---|---|
ADO | Advanced Diagnostics Option |
BDO | Basic Diagnostics Option |
BSDL | Boundary-Scan Description Language |
CPLD | Complex Programmable Logic Device |
CSV | Comma-separated value file (comma-delimited file) |
CVF | Compact Vector Format |
FIFO | First-In-First-Out |
FPI | Flash Programming Information |
GUI | Graphical User Interface |
ETF | Extensible Test Format |
IC | Integrated Circuit |
IEEE | Institute of Electrical and Electronics Engineers, Inc. |
ISP | In-System Programming |
JAM | A device programming and test language |
JEDEC | The JEDEC Solid State Technology Association (Once known as the Joint Electron Device Engineering Council) |
JTAG | IEEE 1149.1 Standard Joint Test Action Group interface |
PCB | Printed Circuit Board |
SOF | Stop-on-failure |
STAPL | Standard Test and Programming Language |
SVF | Serial Vector Format |
TAP | Test Access Port, interface to connect to Corelis Controller |
TTD | Truth Table Diagnostics |
UUT | Unit Under Test |