This article provides an overview of the JTAG architecture and the technology trends that make JTAG essential for reducing development and production costs, speeding test development, and improving product quality with increased fault coverage.
This tutorial provides an overview of Boundary-Scan Description Language, BSDL, which is widely used within the IEEE 1149.1 / JTAG community to enable consistent, accurate and useful information to be defined for a boundary-scan-enabled device.
I2C Trigger Tutorial
The Corelis I2C Exerciser software for CAS-1000-I2C/E and BusPro-I bus analyzers includes a powerful, advanced sequential trigger for I2C protocol traffic. This tutorial introduces advanced I2C Exerciser users to the capabilities of the advanced trigger.
This Corelis BusPro-S Serial Peripheral Interface (SPI) tutorial provides an introduction to the SPI bus including multi-IO configurations, common transaction formats, and example SPI Exerciser command code for common SPI transactions.