JTAG Boundary-Scan Training Classes

Corelis offers free three-day training classes that include a boundary-scan tutorial and hands-on lab exercises using Corelis ScanExpress hardware and software. The training class covers all aspects of boundary-scan testing using Corelis ScanExpress tools. Design for testability (DFT), JTAG embedded functional test (JET), in-system programming (ISP) and test procedure generation are also covered.

The training includes a combination of lectures, demonstrations, and hands-on exercises using actual hardware to provide you with an overview of ScanExpress test and ISP features and to have you run your own developed test.

Corelis Training Class Schedule and Location

All Corelis training classes held at Corelis Headquarters in Cerritos, California are at NO CHARGE!

2018 Schedule

January 23-25, 2018
March 13-15, 2018
May 15-17, 2018
July 17-19, 2018
September 11-13, 2018
November 6-8, 2018

Location

Corelis Headquarters
13100 Alondra Blvd.
Cerritos, CA  90703

Sign up today!

Reserve your spot in a Corelis training class.

Call, email, or fill out the registration form to register for a Corelis training class.
+1 (562) 926-6727
training@corelis.com

Training Class FAQ

Who should attend?

This class is intended for design engineers, test engineers, and managers who plan to use boundary-scan test methodology and the Corelis ScanExpress family of products. Previous knowledge of boundary-scan technology is not required.

How can I prepare for the class?

The class is designed to start from the basics. But it does help the learning curve having some ideas about what boundary scan is prior to class. Some suggestion on preparing for the class include reading through the JTAG Tutorial and if you have additional time also the BSDL Tutorial.

What will I learn?

Upon completion of the training you will be able to correctly implement boundary-scan DFT and ISP facilities into your new designs. You will also be able to develop boundary-scan test procedures on your own as well as in-system programming files for CPLDs and Flash memories.

Topics covered in the class include:

  • Introduction to boundary-scan

  • Design for boundary-scan testability Guidelines

  • Design for boundary-scan In-System Programming Strategy

  • Test generation and testing methods for boundary-scan-based designs

    • Test program generation methodology

    • Test program execution plan

    • Test program interactive debugging concepts

  • At-speed embedded functional testing using an on-board JTAG-based CPU

  • In-system programming of CPLDs and Flash memories tutorial

  • Hands-on individual lab exercises using real Units Under Test (UUTs) that will teach you:

    • How to generate and execute interconnect tests

    • How to test memory interconnects

    • How to test logic clusters

    • How to use an embedded processor’s JTAG port for embedded functional testing

    • How to program CPLDs and Flash memories in circuit

    • How to troubleshoot a test procedure

You will become familiar with the entire Corelis ScanExpress product family, including:

  • ScanExpress TPG

  • ScanExpress JET

  • ScanExpress DFT Analyzer

  • ScanExpress Merge

  • ScanExpress Runner

  • ScanExpress ADO

  • ScanExpress Viewer

  • ScanExpress Debugger

  • ScanExpress Programmer

  • ScanExpress Flash Generator

How can I get more information and register?

For additional schedule and registration information about training classes, please contact:

Corelis Training
training@corelis.com
+1 (562) 926-6727

Classes are subject to cancellation two weeks prior to start date.

Classes held at the Corelis Headquarters are no-charge.

On-site training classes are available. Contact your Corelis sales engineer or sales@corelis.com for scheduling and pricing information.