Live 1-Hour Webinar on Successful Strategies for Boundary-Scan Testing

 

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LIVE Webinar October 26th, 2020 @ 10:00 AM PDT

ABOUT THE WEBINAR
This webinar distills years of experience working with customers and developing customer test procedures. Learn a successful approach to boundary-scan test development from our experts and add our experience base to your knowledge. We will discuss blockers to successful test procedure development, some common hurdles, and how to resolve them.

This is an advanced webinar for test and development engineering professionals. For a primer on boundary-scan technology, please view our Introduction to Boundary-scan webinar, here: https://register.gotowebinar.com/recording/762574391229003522

Agenda
1. Intro
2. Measuring Success – What is successful test procedure development?
3. Strategy – Planning for successful development
4. Important Skills – Useful knowledge and capabilities
5. Perspectives – Aligning test capabilities with goals
6. Test Tactics – Methods for maximizing success
7. Common Hurdles – Frequent blockers and how to remove them
8. Outro Live 15 min. Q & A

by Todd Yuen
Applications Engineer
Corelis Inc.

Todd has forty-three years of Aerospace and Commercial engineering. He has been with Corelis for 21 years and has a BSEE from Purdue University of West Lafayette, Indiana. His Corelis background includes developing boundary scan tests for over one-hundred and fifty customer boards and assisting customers for fifteen years in Support and as an Applications Engineer. His favorite past-times consist of celebrating with chocolate when his assistance helps customers experience an AHA! moment.

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On-demand Five Sessions on JTAG Boundary-Scan Engineering Training & Product Overview

Over three days, five sessions, 2 hours each session

ABOUT THE WEBINAR

Corelis is offering a free live webinar (three days, five sessions, 2 hours each session) engineering training class that is replacing the on-site physical training due to the COVID-19 restrictions. The webinar will include a very deep technical dive into JTAG boundary-scan featuring Corelis ScanExpress hardware and software. The training class covers all aspects of boundary-scan and extended JTAG testing using Corelis ScanExpress tools. Design for testability (DFT), JTAG embedded functional test (JET), in-system programming (ISP) and test procedure generation are also covered. The training includes a combination of lectures and demonstrations by the instructor using actual hardware to provide you with an overview of ScanExpress test and ISP features and will demonstrate how to develop and run a variety of developed tests. Our Senior Applications Engineer will be taking questions throughout the webinar.

DAILY SESSION AGENDA

Session 1 – Introduction & Automatic Test Pattern Generation (TPG)

Session 2 – ATPG Continued, Test Execution & Diagnostics

Session 3 – Diagnostics Continued, Visualization, Debugging, and Cluster Tests

Session 4 – In-System-Programming (ISP) and Design-For-Testability (DFT)

Session 5 – Combined Assemblies, Scripts, CPU-based test, & Advanced Topics

by Bob Deibner
Senior Applications Engineer
Corelis Inc.

Bob has been with Corelis for 12 years and has a BSEE from the University of California, Irvine. He has a deep understanding and experience in IEEE Boundary-scan test standards, as well as, Corelis products, and services. Bob has a passion for educating and training, leading Corelis training classes at customer on-site locations, online webinars, and on-site at Corelis headquarters in Cerritos, California.

On-Demand Webinar on ScanExpress JTAG Embedded Test (JET), At Speed Functional Testing

Produced July 14, 2020 

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ABOUT THE WEBINAR
Functional circuit board testing presents many challenges that are often costly and time-consuming. Most functional tests need to be customized for each design, limiting reusability. This results in software engineers vying for time between development code and test code. Even when functional tests become available, the diagnostic details are often inadequate to give clear visibility on a given problem.

ScanExpress JET is a software solution designed to overcome these challenges by automating the functional test generation process on CPU–based IEEE-1149.1 compliant circuit boards. Coined JTAG Embedded Test, JET is the preferred method for at-speed, non-intrusive functional testing.

Agenda:
Introduction
Corelis Overview and History
What is ScanExpress JET?
Features and Benefits of ScanExpress JET
Methodology
Supported Processors
HW Connection Devices
Live Demo of ScanExpress JET and Runner
Live Q & A

by Jay Marcinczyk
Field Applications Engineer
Corelis Inc.

Jay Marcinczyk, a Field Application Engineer for Corelis, has an extensive background in the embedded systems field as a tester, developer, and coder. From testing software on nuclear submarines to developing embedded diagnostics for some of the first Dell computers. The last half of his career has been working on the Sales team as an FAE. But don’t hold that against him.

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On-demand Webinar an Introduction to JTAG / Boundary-scan, Common Applications of Boundary-scan, & Good Design Practices

Produced Feb. 27, 2020

Traditional JTAG/Boundary-scan testing has empowered organizations to improve test coverage while reducing test time and cost, while leveraging the same tests throughout the product life cycle. Learn how JTAG/Boundary-scan can be used to test, debug, and program electronic systems using the popular JTAG TAP interface.

Agenda:

  • Introduction to JTAG/Boundary-scan
  • Common applications of JTAG/Boundary-scan
  • Good design practices

Q & A by Bob Deibner
Senior Applications Engineer
Corelis Inc.

Bob has been with Corelis for 12 years and has a BSEE from the University of California, Irvine. He has a deep understanding and experience in IEEE Boundary-scan test standards, as well as, Corelis products, and services. Bob has a passion for educating and training, leading Corelis training classes at customer on-site locations, online webinars, and on-site at Corelis headquarters in Cerritos, California.

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