On-demand Webinar on ScanExpress JTAG Embedded Test (JET), At Speed Functional Testing

Produced Tuesday, May 19, 2020

ABOUT THE WEBINAR
Functional circuit board testing presents many challenges that are often costly and time-consuming. Most functional tests need to be customized for each design, limiting reusability. This results in software engineers vying for time between development code and test code. Even when functional tests become available, the diagnostic details are often inadequate to give clear visibility on a given problem.

ScanExpress JET is a software solution designed to overcome these challenges by automating the functional test generation process on CPU–based IEEE-1149.1 compliant circuit boards. Coined JTAG Embedded Test, JET is the preferred method for at-speed, non-intrusive functional testing.

Agenda:
Introduction
Corelis Overview and History
What is ScanExpress JET?
Features and Benefits of ScanExpress JET
Methodology
Supported Processors
HW Connection Devices
Live Demo of ScanExpress JET and Runner
Live Q & A

by Jay Marcinczyk
Field Applications Engineer
Corelis Inc.

Jay Marcinczyk, a Field Application Engineer for Corelis, has an extensive background in the embedded systems field as a tester, developer, and coder. From testing software on nuclear submarines to developing embedded diagnostics for some of the first Dell computers. The last half of his career has been working on the Sales team as an FAE. But don’t hold that against him.

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On-demand Webinar an Introduction to JTAG / Boundary-scan, Common Applications of Boundary-scan, & Good Design Practices

Produced Feb. 27, 2020

Traditional JTAG/Boundary-scan testing has empowered organizations to improve test coverage while reducing test time and cost, while leveraging the same tests throughout the product life cycle. Learn how JTAG/Boundary-scan can be used to test, debug, and program electronic systems using the popular JTAG TAP interface.

Agenda:

  • Introduction to JTAG/Boundary-scan
  • Common applications of JTAG/Boundary-scan
  • Good design practices

Q & A by Bob Deibner
Senior Applications Engineer
Corelis Inc.

Bob has been with Corelis for 12 years and has a BSEE from the University of California, Irvine. He has a deep understanding and experience in IEEE Boundary-scan test standards, as well as, Corelis products, and services. Bob has a passion for educating and training, leading Corelis training classes at customer on-site locations, online webinars, and on-site at Corelis headquarters in Cerritos, California.

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