Download Whitepaper on Enhancing Boundary-Scan with JTAG Embedded Test
Corelis’ ScanExpress JET represents a major step forward for automatic circuit board testing. The JTAG Embedded Test method extends coverage beyond popular boundary-scan techniques to virtually every signal of the UUT that is accessible by the on-board CPU(s). This includes most of the remaining non-scannable, analog, and I/O port resources. As a bonus, it employs full-speed functionality verification without modifications to the circuit, its onboard firmware, or the test fixture.
- Demanding Test Requirements for Processor Based Boards
- What is JET and how does it work?
- Enhancing Boundary-Scan with JTAG Embedded Test
- Connecting to the UUT
ScanExpress JET Benefits